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1/20 www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. power management ics for au tomotive body control led drivers for automotive light bd8381efv-m description bd8381efv-m is a white led driver with the capa bility of withstanding high input voltage (50v max). a current-mode buck-boost dc/dc controller is also integrated to achieve stable operation against voltage input and also to remove the constraint of the number of leds in series connection. the brightness can be controlled by either pwm or dc. the pwm brightness si gnal generation circuit is built into, and the control without microcomputer is also possible. features 1) input voltage range 5.0 ? 30 v 2) integrated buck-boost cu rrent-mode dc/dc controller 3) built-in cr timer for pwm brightness 4) pwm linear brightness 5) built-in protection functions (uvlo, ovp, tsd, ocp, scp) 6) led error status detection function (open/ short) 7) htssop-b28 package applications headlight and running (drl) of night of daylight, etc. absolute maximum ratings (ta=25 ) parameter symbol ratings unit power supply voltage vcc 50 v boot voltage v boot 55 v sw,cs,outh voltage v sw, v cs, v outh 50 v boot-sw voltage v boot-sw 7 v vreg,ovp,outl,fail1,fail2,thm,ss, comp,rt,sync,en,disc,vth,fb,ledr, ledc,drlin, pwmout,ct voltage v vreg ,v ovp ,v outl ,v fail1 ,v fail2 ,v thm, v ss, v comp ,v rt ,v sync v en ,v disc ,v vth ,v fb ,v ledr , v ledc, ,v drlin, v pwmout v ct -0.3 7 < v cc v power consumption pd 1.45 1 w operating temperatur e range topr -40 +125 storage temperature range tstg -55 +150 junction temperature tjmax 150 1 ic mounted on glass epoxy board measuring 70mm70m m1.6mm, power dissipated at a rate of 11.6mw/ at temperatures above 25 . 2 a radiation is not designed. operating conditions (ta=25 ) parameter symbol ratings unit power supply voltage v cc 5.0 30 v oscillating frequency range f osc 200 600 khz external synchronization frequency range 3 4 f sync fosc600 khz external synchronization pulse duty range f sduty 40 60 % 3 connect sync to gnd or open when not using external frequency synchronization. 4 do not switch between internal and external synchronization when an external synchronization signal is input to the device. no.11039eat14
technical note 2/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. electrical characteristics (unless otherwise specified, vcc=12v ta=25 ) parameter symbol limits unit conditions min typ max. circuit current icc - 4.5 7.0 ma en=hi, sync=hi, rt=open, cin=10f standby current ist - 0 8 a en=low [vreg block (vreg)] reference voltage vreg 4.5 5.0 5.5 v ireg=-5ma creg=10f [outh block] outh high-side on resistance ronhh 1.5 3.5 7.0 ion=-10ma outh low-side on resistance ronhl 1.0 2.5 5.0 ion=10ma over-current protection operating voltage volimit vcc -0.68 vcc -0.60 vcc -0.52 v [outl block] outl high-side on resistance ronlh 2.0 4.0 8.0 ion=-10ma outl low ?side on resistance ronll 1.0 2.5 5.0 ion=10ma [sw block] sw low -side on resistance ronsw 2.0 4.5 9.0 ionsw=10ma [pwmout block] pwmout high-side on resistance ronpwmh 2.0 4.0 8.0 ionpwmh=-10ma pwmout low-side on resistance ronpwml 1.0 2.5 5.0 ionpwml=10ma [error amplifier block] reference voltage vref2 0.190 0.200 0.210 v fb-compshort, ta = - 4 0 125 comp sink current icompsink 50 75 100 a vfb>0.2v, vcomp=1v comp source current icompsource -100 -75 -50 a vfb <0.2v, vcomp=1v [oscillator block] oscillating frequency fosc 285 300 315 khz rt=100k [ovp block] over-voltage detection reference voltage vovp 1.9 2.0 2.1 v vovp=sweep up ovp hysteresis width vohys 0.45 0.55 0.65 v vovp= sweep down [uvlo block ] uvlo voltage vuvlo 4.0 4.3 4.6 v vcc : sweep down uvlo hysteresis width vuhys 50 150 250 mv vcc : sweep up [pwm generation circuit block] vth threshold voltage vth1 3 2/3vreg 3.7 v vth threshold voltage vth2 1 1/3vreg 2 v pwm minimum on width tpwmon 25 - - s led open detection function vopen 30 50 70 mv led short detection function vshort 100 200 400 mv vshort R lvledr-vledcl led gnd short protection timer ts hort 100 150 200 ms ct=0.1f [logic inputs] input high voltage vinh 3.0 - - v input low voltage vinl gnd - 1.0 v input current 1 iin 20 35 50 a vin=5v (sync/drlin) input current 2 ien 25 40 55 a ven=5v (en) [fail output (open drain) ] fail low voltage vol - 0.1 0.2 v iol=0.1ma this product is not designed for use in radioactive environments.
technical note 3/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. 0 2 4 6 8 10 01 23 45 en voltage:ven [v] output voltage:vreg [v] 0 2 4 6 8 10 012345 vth voltage:vvth [v] pwmout output voltage [v] 0 2 4 6 0 5 10 15 20 25 30 35 40 45 50 vcc voltage [v] output voltage:vreg [v] 0 100 200 300 400 500 600 700 -50 - 25 0 25 50 75 100 125 temperature:ta [ ] switching frequency:fosc [khz] 0.0 2.0 4.0 6.0 8.0 0 5 10 15 20 25 30 35 40 45 50 supply voltage:vcc [v] output carrent:icc [ma] 0.18 0.185 0.19 0.195 0.2 0.205 0.21 0.215 0.22 - 50 -25 0 25 50 75 100 125 temperature:ta [ ] fb reference voltage [v] 0.54 0.56 0.58 0.60 0.62 0.64 0.66 -50-25 0 25 50 75100125 temperature:ta [ ] output voltage:vcc-vcs [v] vcc=12v 50 60 70 80 90 100 6 9 12 15 18 vcc voltage [v] efficiency [%] iout=600ma 0 50 100 150 200 250 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 thm voltage:thm[v] referencevoltage :vref [mv] fig.7 thm gain electrical characteristic curves (reference data) (unless otherwise specified, ta=25 ) fig.1 vreg temperature characteristic fig.2 osc temperature characteristic fig.4 circuit current (switching off) fig.3 standard voltage temperature characteristic fig.5 overcurrent detection voltage temperature characteristic fig.9 en threshold voltage fig.8 vth threshold voltage fig.6 efficiency (input voltage dependence)
technical note 4/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. block diagram and pin configuration fig.10 buck-boost application composition pin layout pin function table bd8381efv-m(htssop-b28) fig.11 pin symbol function 1 comp error amplifier output 2 ss soft start 3 vcc input power supply 4 en enable input 5 rt oscillation frequency-setting resistance input 6 sync external synchronization signal input 7 gnd small-signal gnd 8 thm thermally sensitive resistor connection pin 9 fb erramp fb signal input pin 10 disc cr timer discharge pin 11 vth cr timer threshold pin 12 drlin drl switch terminal (p ulse output setting terminal) 13 fail1 failure signal output 14 fail2 led open/short detection signal output 15 ovp over-voltage detection input 16 ledc led short detection pin (led detection side) 17 ledr led short detection pin (resistor detection side) 18 n.c. - 19 pgnd pwm brightness source pin 20 pwmout pwm brightness signal output pin 21 ct gnd short protection timer setting pin 22 outl low-side external fet gate drive out put 23 dgnd low-side fet driver source pin 24 sw high-side fet source pin 25 outh high-side external fet gate drive out put 26 cs dc/dc output current detection pin 27 boot high-side fet driver source pin 28 vreg internal reference voltage output dgnd comp err amp vin vcc en rt ovp control logic cs fail1 vreg disc gnd fail2 ocp ovp open/ short/ scp detect sw boot pwm vreg osc slope ss cr timer timer latch open det scp det ocp ovp tsd uvlo timer latch pwm drv ctl - + + sync outh outl vreg thm vth vreg vreg cout ledr ledc pwmout fb short det pgnd ss ct drlin 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14
technical note 5/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. 5v voltage reference (vreg) 5v (typ.) is generated from the vcc input voltage when the enabl e pin is set high. this voltage is used to power internal circuitry, as well as the voltage source for device pins that need to be fixed to a logical high. uvlo protection is integrated into t he vreg pin. the voltage regulation circ uitry operates uninterrupted for output voltages higher than 4.5 v (typ.), but if output voltage drops to 4.3 v (typ.) or lower, uvlo engages and turns the ic off. connect a capacitor (creg = 10f typ.) to the vreg terminal for phase compensation. operation may become unstable if creg is not connected. about the method of setting the output current iled=min[thm / 5 v , 0.2v] / riset [a] as for min[thm / 5 v, 0.2v], small one is selected from among thm and vfb=0.2v. please input within the range of 0.25-5.0v when controlling t he output current with thm. please connect with vreg when not using thm. there is a possibility that t he led gnd short detection malfunctions when thm Q 0.25v. as for pwm brightness, the control by the pwm signal from the outside and brightness with the cr timer are possible. (gnd short protection detection timer (scp) works at the same time as turning on en when pwm brightness from the outside is used. therefore, ther e is a possibility of mis-detecting scp for t he time from the en turning on to the pwm turning on > gnd short protection detection timer.) fig. 12 about time from en turning on to pwm turning on and the start from pwm low duty about dirating of the led current that uses thm it is an ability to set the dirating curve of the led current to t he temperature as one of the func tions to use thm. as for led , because deterioration at the high temperat ure is fast, the maximum allowance led currents and the curve of temperatures is given to the data sheet of led. the voltage with a negative temperature characteristic in thm the thermistor resistance is used is input, and the led current is controlled when t he led current is controlled according to the temperature characteristic. moreover, external tr is used, and two input composition is also possible. 1.44 (r cr 1+2r cr 2)c cr fpwm= ton_pwm= r cr 2 (r cr 1+2r cr 2) 100 vth outl iled the gnd short protection det ecting function (hereafter, scp) starts with en=low hi, and after the time of the timer set with the external ca pacitor connected with ct, it becomes latch off. (above figure and ) the charge with ss begins synchronizing with turning on en. the pwm latch off function is built into when there is not pwm turning on, and when the pwm latch off is detected, ( of ss and the scp counter) is reset. (the time of the timer at latch o ff is calculated by oscillatory frequency 32770 counts of dc/dc. ) ther efore, the following relations exist at time until pwm is turned on, time of pwm latch timer and scp detection time after en is turned on at external brightness. (however, after is turned on, < is deleted from the sequence because doesn't operate. ) each sequence ??? scp is detected and no led light. ??? led lighting ??? led lighting en pwm coup outl ss scp timer detection starts time of scp timer time until turning on pwm time of pwm latch timer time until switching starts after inputting pwm rcr1 20 k rcr2 10 k cc r 100000 pf
technical note 6/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. buck-boost dc/dc controller ? over-voltage protection circuit (ovp) the output of the dcdc converter should be connected to the ovp pin via a voltage divider. in determining an appropriate trigger voltage of for ovp function, consider the to tal number of leds in series and the maximum variation in vf. also, bear in mind that over-current protection (ocp ) is triggered at 0.85 x ovp trigger voltage. if the ovp function engages, it will not release unless the dcdc voltage drop s to 72.5% of the ovp trigger voltage. for example, if rovp1 (out put voltage side), rovp2 (gnd side), and dc dc voltage vout are conditions for ovp, then: vout ( rovp1 + rovp2 ) / rovp2 x 2.0 v. ovp will engage when vout R 32 v if rovp1 = 330 k ? and rovp2 = 22 k ? . ? buck-boost dc/dc converter oscillation frequency (fosc) the regulator?s internal triangular wave oscillation frequenc y can be set via a resistor connected to the rt pin (pin 5). this resistor determines the charge/discharge current to the internal capacitor, t hereby changing the oscillating frequency. refer to the following theoretical formula when setting rt: fosc = x [khz] 60 x 10 6 (v/a/s) is a constant (5%) determined by the internal circuitry, and is a correction factor that varies in relation to rt: { rt: = 50k? : 0.98, 60k ? : 0.985, 70k ? : 0.99, 80k ? : 0.994, 90k ? : 0.996, 100k ? : 1.0, 150k ? : 1.01, 200k ? : 1.02, 300k ? : 1.03, 400k ? : 1.04, 500k ? : 1.045 } a resistor in the range of 62.6k ? 523k ? is recommended. settings that dev iate from the frequency range shown below may cause switching to stop, and proper operation cannot be guaranteed. fig.13 rt versus switching frequency fig.14 rt versus sync frequency ? external dc/dc converter oscillating frequency synchronization (fsync) do not switch from external to internal oscillation of the dc/dc converter if an external sy nchronization signal is present on the sync pin. when the signal on the sy nc terminal is switched from high to low, a delay of about 30 s (typ.) occurs before the internal oscillation circuitry starts to oper ate (only the rising edge of the input clock signal on the sync terminal is recognized). moreover, the external synchronizing signal is given to priority when an external input frequency is used. and in the case of using external input frequency, follow the fig.14. ? soft start function the soft-start (ss) limits the current and slows the rise-time of the output voltage during the start-up, and hence leads to prevention of the overshoot of the out put voltage and the inrush current. the ss voltage is made low when ovp of the overcurrent and the excess voltage is detected, and the switching is stopped. resume operation is begun. 60 10 6 rt [ ] dc/dc frequency [khz] sync frequency[khz]
technical note 7/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. ? self-diagnostic functions the operating status of the built -in protection circuitry is propagated to fai l1 and fail2 pins (open-drain outputs). fail1 becomes low when uvlo, tsd, ovp, or scp protection is engaged, whereas fail2 becomes low when open or short led is detected. ? operation of the protection circuitry ? under-voltage lock out (uvlo) the uvlo shuts down all the circuits other than reg when vreg Q 4.3v (typ). ? thermal shut down (tsd) the tsd shuts down all the circuits other than reg when the tj reaches 175 (typ), and releases when the tj becomes below 150 (typ). ? over current protection (ocp) the ocp detects the current through the power-fet by moni toring the voltage of the high-side resistor, and activates when the cs voltage becomes less than vcc-0.6v (typ). when the ocp is activated, the external capacitor of the ss pin becomes discharged and the switching operation of the dcdc turns off. ? over voltage protection (ovp) the output voltage of the dcdc is detected with the ovp-pin voltage, and the protection activates when the ovp-pin voltage becomes greater than 2.0v (typ). when the ovp is activated, the external capacitor of t he ss pin becomes discharged and the switching operation of the dcdc turns off. ? short circuit protection (scp) when the fb-pin voltage becomes less than 0.05v (typ), the inte rnal counter starts operating and latches off the circuit approximately after 150ms (when ct = 0.1f). if the fb-pin vo ltage becomes over 0.05v bef ore 150ms, then the counter resets. when the led anode (i.e. dcdc output voltage) is s horted to ground, then the le d current becomes off and the fb-pin voltage becomes low. furthermore, the led current al so becomes off when the led cathode is shorted to ground. hence in summary, the scp works with both cases of the led anode and the cathode being shorted. ? led open detection when the led-pin voltage ? 0.05v (typ) as well as ovp-pin voltage ? 1.7v (typ) simultaneously, the device detects as led open and latches off that particular channel. uvlo tsd ovp ocp s r q counter scp en=low uvlo/tsd fail1 open short s r q en=low uvlo/tsd fail2 mask
technical note 8/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. ? led short detection when the voltage between ledr-pin and ledc-pin ? 0.2 (typ), the internal counter starts operating, and approximately after 100ms (when fosc = 300khz) the operation latches off. wi th the pwm brightness contro l, the detecting operation is processed only when pwmout-pin = high. if the conditi on of the detection operation is released before 100ms (when fosc = 300khz), then the internal counter resets. there is a possibility that the led shor t detection malfunctions when the differenc e of vf is large. therefore, please adjust external resistance for connected vf. it is recommended 2v-3v to the input range of ledr and ledc. the counter frequency is the dcdc switching frequency determ ined by the rt. the latch proceeds at the count of 32770. high luminance led (multichip) with built-in led of x piece in 1chip when using y piece fig. 15 when using the single chip fig. 16 setting method r1 r2 = x 1 r3 r4 = ( x + 1 ) y ? 1 1 setting method r1 r2 = 1 1 r3 r4 = 2y ? 1 1 vout(dc/dc output y piece x piece pwmout fb ledc ledr r 3 r 4 r 1 r 2 vout(dc/dc output y piece pwmout fb ledc ledr r 3 r 4 r 1 r 2
technical note 9/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. error all condition protection detecting condition operation after detect [detect] [release] uvlo vreg<4.3v vreg>4.45v all blocks (but except reg) shut down tsd tj>175 tj<150 all blocks (but except reg) shut down ovp vovp>2.0v vovp<1.45v ss discharged ocp vcs Q vcc-0.6v vcs>vcc-0.6v ss discharged scp vfb<0.05v (150ms delay when ct=0.1f) en or uvlo counter starts and then latches off all blocks (but except reg) led open vfb<0.05v & vovp>1.7v en or uvlo counter starts and then latches off all blocks (but except reg) led short lvledr-vledcl>0.2v (100ms delay when fosc=300khz) en or uvlo counter starts and then latches off all blocks (but except reg) protection sequence fig.17 power supply turning on sequence please turn on en with vcc R 4.5v or more after impressing vcc. please fix the potential of drli n and thm before turning on en. a soft start operates at the same time as turning on en, and the switching is output. after turning on vcc, the order is not related to other input when inputting external pwm from vth. it leads to the destruction of ic and external parts because it doesn't error output according to an external constant of adjacent pin 24pin sw terminal, 25pin outh terminal, 26pin cs terminal and 27pin boot terminal. vcc en vreg uvlo thm (input by the resistance division of vreg. ) sync drlin ss outl vout 4.5v release
technical note 10/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. operation in error circumstances of led led open detection fig.18 led short detection fig.19 led anode/cathode land gnd short detection fig.20 vcc outh sw outl pwmout vout open rsense q1 fb fb outh/outl vout/ovp fail2 led open switching duty extends. switching stop 50m v 0v 1.7v led open detection when vovp R 1.7 and vfb Q 50mv when it achieves the detection condition, the fp latch is done. vcc outh sw outl pwmout vout n 1 n 1 ledr rsense q1 short vout outh/outl fail2 switching stop it detects short, and after the timer of t, error is detected with fail2. ledr-ledc it gets down by led1 step. 0.2v fosc 0v t=32770 fosc 1 vcc outh sw outl pwmout vout rsense q1 vout outh/outl fail2 switching stop it detects short, and after the timer of t, error is detected with fail2. fb led anode gnd short short to gnd 0v 0v 200mv 50mv capacity dependence connected with ct timer operation of ct after gnd short detection. fail1 becomes hi? low. 1
technical note 11/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. procedure for external components selection follow the steps as shown below for selecting the external components 1. work out il_max from the operating conditions. 2. select the value of rsc such that iocp > il_max 3. select the value of l such that 0.05[v/s] < l vout *rcs < 0.3[v/ s] 4. select coil, schottky diodes, mosfet and rcs which meet with the ratings 5. select the output capacitor which meets with the ripple voltage requirements 6. select the input capacitor 7. work on with the compensation circuit 8. work on with the over-voltage protection (ovp) setting 9. work on with the soft-start setting 10. verify experimentally feedback the value of l
technical note 12/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. 1. computation of the input peak current and il_max calculation of the maximu m output voltage (vout_max) to calculate the vout_max, it is necessary to take into a ccount of the vf variation and the number of led connection in series. vout_max = (v f + v f ) n + 0.2+ rpwmon iout v f : vf variation n: number of led connection in series rpwmon: pwmout fet ron calculation of the output current iout d: fb standard voltage variation m: output current resistance variation calculation of the input peak current i l_max i l_max = i l_avg + 1/2 i l i l_avg = (v in + vout) iout / (n v in ) i l = n: efficiency fosc: switching frequency ? the worst case scenario for vin is when it is at the mi nimum, and thus the minimum value should be applied in the equation. ? the l value of 10h ? 47h is recommended. the current-mode type of dc/dc conversion is adopted for bd8381efv-m, which is optimized with the use of the reco mmended l value in the design stage. this recommendation is based upon the efficiency as well as the stability. the l values outside this recommended range may cause irregular switching waveform and hence deteriorate stable operation. ? n (efficiency) is approximately 80% fig.21 external application circuit 2. the setting of over-current protection choose rcs with the use of the equation vocp_min (=0.54v) / rcs > i l_max when investigating the margin, it is worth noting t hat the l value may vary by approximately 30%. 3. the selection of the l in order to achieve stable operation of the current-mode dc/dc converter, we recommend selecting the l value in the range indicated below: 0.05 [v/s] < < 0.3 [v/s] the smaller allows stability improvement but slows down the response time. 4. selection of coil l, diode d1 and d2, mosfet m1 and m2, and rcs current rating voltage rating heat loss coil l > i l_max D diode d1 > iocp > vin_max diode d2 > iocp > vout mosfet m1 > iocp > vin_max mosfet m2 > iocp > vout rcs D D > iocp 2 rcs allow some margin, such as the tolerance of the external components, when selecting. in order to achieve fast switching, choose the mosfets with the smaller gate-capacitance. v in l 1 fosc vout v in +vout vout rcs l v in rcs d1 l d2 m2 m1 co vout i l cs vout rcs l iout= 0.2v riset
technical note 13/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. 5. selection of the output capacitor select the output capacitor cout based on th e requirement of the ripple voltage vpp. vpp = + i l_min r esr choose cout that allows the vpp to settl e within the requirement. allow some margin also, such as the tolerance of the external components. 6.selection of the input capacitor a capacitor at the input is also required as the peak current flows between the input and t he output in dc/dc conversion. we recommend an input capacitor greater than 10f with the esr smaller than 100m ? . the input capacitor outside of our recommendation may cause large ripple voltage at the input and hence lead to malfunction. 7. phase compensation guidelines in general, the negative feedback loop is stable when the following condition is met: ? overall gain of 1 (0db) with a phase lag of le ss than 150o (i.e., a phase margin of 30o or more) however, as the dc/dc converter const antly samples the switching frequency, the gain-bandwidth (gbw) product of the entire series should be set to 1/10 the switching frequency of t he system. therefore, the overall stability characteristics of the application are as follows: ? overall gain of 1 (0db) with a phase lag of le ss than 150o (i.e., a phase margin of 30o or more) ? gbw (frequency at gain 0db) of 1/10 the switching frequency thus, to improve response within the gbw product lim its, the switching frequency must be increased. the key for achieving stability is to place fz near to the gbw. gbw is decided by phase delay fp1 by cout and output impedance rl. of each becomes like the next expression. phase-lead fz = [hz] phase-lag fp1 = [hz] good stability would be obtained when the fz is set between 1khz 10khz. please substitute the value at the maximum load for rl. in buck-boost applications, right-hand-plane (rhp) zero exists. this zero has no gain but a pole characteristic in terms of phase. as this zero would cause instabil ity when it is in the control loop, so it is necessary to bring this zero before the gbw. frhp= [hz] i load : m aximum l oad c urrent it is important to keep in mind that these are very loose guidelines, and adjustments may have to be made to ensure stability in the actual circuitry. it is also important to note that stability characteristics can change greatly depending on factors such as substrate layout and load conditions. therefore, when designing for mass-production, stability should be thoroughly investigated and confirm ed in the actual physical design. iout cout vout vout+v in 1 fosc 1 2 cpcrpc fb a comp v out rpc led cpc 1 2 rlcout 2 i load l vout+vin/(vout+vin)
technical note 14/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. 8. setting of the soft-start the soft-start allows minimization of the coil current as well as the overshoot of the output voltage at the start-up. for the capacitance we reco mmend in the range of 0.001 ? 0.1f. for the capacitance less than 0.001f may cause overshoot of the output voltage. for t he capacitance greater than 0.1f may caus e massive reverse current through the parasitic elements of the ic and damage the whole device. in case it is necessary to use the capacitance greater than 0.1f, ensure to have a reverse current protection diode at the vcc or a bypass diode placed between the ss-pin and the vcc. soft-start time tss tss = cssx0.7v / 5ua [s] css: the capacitance at the ss-pin 9. verification of the operation by taking measurements the overall characteristic may change by load current, input voltage, output voltage, inductance, load capacitance, switching frequency, and the pcb layout. we strongly recommend verifying your design by taking the actual measurements.
technical note 15/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. power consumption calculation pc(n) = icc*vcc + 2 1 *ciss*vreg*fsw*vreg 2 2+ 2 1 ciss vreg f pwm vreg 2 icc current of the maximum circuit vcc power-supply voltage ciss external fet capacity vsw sw gate voltage fsw sw frequency f pwm pwm frequency calculation example when assuming pc(4) = 10ma 30v + 500pf 5v 300khz 5v 2 2+ 2 1 1500pf 5 200 5 2, it becomes pc = about 300mw. fig.22 note1: the value of power consumption : on glass epoxy board measuring 70mm70mm1.6mm (1 layer board/copper foil thickness 18m) note2: the value changes depending on t he density of the board copper foil. however, this value is an actual measurement value and no guarantee value. pd=2200mw (968mw) density of the board copper foil 3% pd=3200mw (1408mw) density of the board copper foil 34% pd=3500mw (1540mw) density of the board copper foil 60% the val ue in () is a power consumption of the ta=125 . (1) ja=66.5 /w (density of board copper foil3%) (2) ja=45 /w (density of board copper foil34%) (3) ja=40 /w (density of board copper foil60%) ambient temperature ta[ ] 4 power consumption pd[ ] 2 1 0 150 125 100 75 50 25 3 (3) 3.12w (2) 2.77w (1) 1.88w 95
technical note 16/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. application circuit 1 dgnd comp err amp vin vcc en rt ovp control logic cs fail1 vreg disc gnd fail2 ocp ovp open/ short/ scp detect sw boot pwm vreg osc slope ss cr timer timer latch open det scp det ocp ovp tsd uvlo timer latch pwm drv ctl - + + sync outh outl vreg thm vth vreg vreg cout ledr ledc pwmout fb short det pgnd ss ct drlin inp2 inp1 fig. 23 buck application composition (it is inp1, inp2, and two input selector function. ) application circuit 2 dgnd comp err amp vin vcc en rt ovp control logic cs fail1 vreg disc gnd fail2 ocp ovp open/ short/ scp detect sw boot pwm vreg osc slope ss cr timer timer latch open det scp det ocp ovp tsd uvlo timer latch pwm drv ctl - + + sync outh outl vreg thm vth vreg vreg cout ledr ledc pwmout fb short det pgnd ss ct drlin fig. 24 boost application composition (when invalidating short detection. )
technical note 17/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. input/output equivalent circuits 1. comp 2. ss 4. en 5. rt 6. sync 8. thm 9. fb 10. disc 11. vth 12. drlin vreg vcc ss en vreg rt vreg vreg sync vcc vcc fb vreg disc vreg vth vcc ovp vreg vreg comp 15. ovp 13,14. fail1,fail2 fail1 fail2 vcc drlin the values are all typ. value.
technical note 18/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. input/output equivalent circuits(continuation) 20. ct 24. sw 25. outh 26. cs 27. boot vreg ct vcc sw boot boot sw sw sw outh vreg boot 16,17. ledc, ledr ledc ledr 19,22. pwmout, outl cs 28. vreg vreg vcc vreg vreg vreg the values are all typ. value.
technical note 19/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. notes for use 1. absolute maximum ratings we are careful enough for quality control about this ic. so, t here is no problem under normal operation, excluding that it exceeds the absolute maximum ratings. ho wever, this ic might be destroyed when the absolute maximum ratings, such as impressed voltages or the operating te mperature range(topr), is exceeded, and whether the destruction is short circuit mode or open circuit mode cannot be specif ied. please take into consideration the physical countermeasures for safety, such as fusing, if a particular mode that ex ceeds the absolute maximum rating is assumed. 2. reverse polarity connection connecting the power line to the ic in reverse polarity (from that recommended) will dam age the part. please utilize the direction protection device as a diode in the supply line. 3. power supply line due to return of regenerative current by reverse electromotive fo rce, using electrolytic and ceramic suppress filter capacitors (0.1f) close to the ic power input terminals (vcc and gnd) are recommended. please note the electrolytic capacitor value decreases at lower temperatures and examine to dispense physi cal measures for safety. and, for ics with more than one power supply, it is possible that rush current may flow instantaneously due to the internal powering sequence and delays. therefore, give special consideration to power coupling capa citance, width of power wiring, gnd wiring, and routing of wiring. please make the power supply lines (where large current flow) wide enough to reduce the resistance of the power supply patterns, because the resistance of power supp ly pattern might influence the usual operation. 4. gnd line the ground line is where the lowest potential and transient voltages are connected to the ic. 5. thermal design do not exceed the power dissipation (pd) of the package specification rating under actual operation, and please design enough temperature margins. 6. short circuit mode between terminals and wrong mounting do not mount the ic in the wrong direction and be careful about the reverse-connection of the power connector. moreover, this ic might be destroyed when the dust shor t the terminals between them or power supply, gnd. 7. radiation strong electromagnetic radiati on can cause operation failures. 8. aso(area of safety operation.) do not exceed the maximum aso and the absolu te maximum ratings of the output driver. 9. tsd(thermal shut-down) the tsd is activated when the juncti on temperature (tj) reaches 175 (with 25 hysteresis), and t he output terminal is switched to hi-z. the tsd circuit aims to intercept ic from hi gh temperature. the guarantee and protection of ic are not purpos e. therefore, please do not use this ic after tsd circuit operat es, nor use it for assumption that operates the tsd circuit. 10. inspection by the set circuit board the stress might hang to ic by connecting the capacitor to the terminal with low impedance. then, please discharge electricity in each and all process. moreover, in the inspec tion process, please turn off t he power before mounting the ic, and turn on after mounting the ic. in addition, please take in to consideration the counte rmeasures for electrostatic damage, such as giving the earth in assembly process, transportation or preservation. 11. ic terminal input this ic is a monolithic ic, and has p + isolation and p substrate for the element separation. therefore, a parasitic pn junction is firmed in this p-layer and n-layer of each element. for instance, the resistor or the transistor is connected to the terminal as shown in the figure below. when the gnd vo ltage potential is greater t han the voltage potential at terminals a or b, the pn junction operates as a parasitic diode. in addition, the parasitic npn transistor is formed in said parasitic diode and the n layer of surrounding elements close to said parasitic diode. these parasitic elements are formed in the ic because of the voltage relation. the pa rasitic element operating causes the wrong operation and destruction. therefore, please be careful so as not to operat e the parasitic elements by impressing to input terminals lower voltage than gnd(p substrate). please do not apply the voltage to the input terminal when the power-supply voltage is not impressed. moreover, please impress each input terminal lower than the power-supply voltage or equal to the specified range in the guaranteed voltage when the power-supply voltage is impressing. structure of ic 12. earth wiring pattern use separate ground lines for control signals and high current power driver outputs. because these high current outputs that flows to the wire impedance changes the gnd voltage fo r control signal. therefore, each ground terminal of ic must be connected at the one point on the set circuit board. as for g nd of external parts, it is similar to the above-mentioned terminal-a parasitic element gnd p + p terminal-a terminal-b gnd p p-substrate cb gnd e e c b gnd surrounding elements resistor transistor(npn) p + p + p + p-substrate parasitic element parasitic element parasitic element terminal-b
technical note 20/20 bd8381efv-m www.rohm.com 2011.04 - rev. a ? 2011 rohm co., ltd. all rights reserved. ordering part number b d 8 3 8 1 e f v - m e 2 part no. part no. package efv: htssop-b28 for automotive packaging and forming specification e2: embossed tape and reel ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape (with dry pack) tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2500pcs e2 () direction of feed reel 1pin (unit : mm) htssop-b28 0.08 m 0.08 s s 1.0 0.2 0.5 0.15 4 + 6 ? 4 0.17 +0.05 - 0.03 15 28 14 1 (2.9) 4.4 0.1 (5.5) (max 10.05 include burr) 0.625 6.4 0.2 9.7 0.1 1pin mark 1.0max 0.65 0.85 0.05 0.08 0.05 0.24 +0.05 - 0.04
r1120 a www.rohm.com ? 2011 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the produc ts. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redundancy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

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